The present invention relates, in general, to the field of power multiplexer switches and methods. More particularly, the present invention relates to a circuit and method for alternatively coupling a supply voltage line (V.sub.DD) or a standby voltage line (V.sub.STB) to an output voltage line (V.sub.OUT) of especial utility in supplying standby power to a microcomputer (MCU) random access memory (RAM).
In some MCU applications, it is desirable that operation of the device be in either a normal or standby mode. In the former instance, a source of V.sub.DD of approximately 5 volts is applied to the MCU including its on-chip RAM. In the latter instance, when the supply voltage is switched off, that is brought to a potential of 0 volts (V.sub.SS), it would then be necessary that standby power be immediately applied in order to ensure the integrity of the RAM's data.
Heretofore, there have been no readily effectuated means for supplying a source of standby power to an integrated circuit such as an MCU RAM, such devices therefore, required either a constant source of V.sub.DD or to have its on-chip RAM reprogrammed upon power up. A system for providing RAM retention during power up and power down is described in U.S. Pat. No. 4,145,761 issued to Gunter et al. and assigned to the assignee of the present invention.